FIT Workshop 26
FIT Workshop 26th: Post-Moore Era Design Automation
Date: Dec. 14, 2024
Place: Jinxi Hotel, Hangzhou, China
General Information
The workshop will bring together global experts, scholars, and industry leaders in the field of EDA to jointly discuss core scientific challenges of the Post-Moore Era, share the latest research findings, and exchange practical experiences. Topics of discussion include, but are not limited to: Design methodologies for novel computing and storage architectures, Innovations in energy-efficient computing and storage architectures, Heterogeneous integration methods and near-memory computing circuit design, Flexible and programmable architectures with multiple operators, and Heterogeneous storage-compute integrated architecture chips.
Organizing Committee
- Faculty of Information Technology, Zhejiang University
- College of Integrated Circuits, Zhejiang University
Agenda
Time | Event | Speaker |
---|---|---|
08:30-08:50 | Gathering | |
08:50-09:00 | Speaker preparation | |
09:00-09:05 | Opening speech | Cheng Zhuo |
09:05-09:35 | Design Tools for Adiabatic Quantum-Flux-Parametron Logic: Toward Extremely Energy-Efficient Computing | Tsung-Yi Ho |
09:35-10:05 | Clock Tree Synthesis in 3D ICs | Pingqiang Zhou |
10:05-10:30 | Break | |
10:30-11:00 | Software-Hardware Co-Design Tools: Lowering the Barriers to Smart Chip Development | Yun Liang |
11:00-11:30 | Circuit Simulation via Exponential Integrator Method | Hao Yu |
11:30-12:00 | On-Device AI for Better Mobile and Implantable Devices | YYS |
12:00-13:40 | Lunch | |
13:40-14:10 | LiTformer: Efficient Modeling and Analysis of High-Speed Link Transmitters Using Non-Autoregressive Transformer | Songyu Sun |
14:10-14:40 | Trending Frontiers of EDA: Can AI Save the World? | Wenhao SUN |
14:40-15:10 | Is Vanilla Bayesian Optimization Enough for High-Dimensional Architecture DesignOptimization? | Yuanhang Gao |
15:10-15:50 | Break | |
15:50-16:20 | Algorithm-Hardware Co-design of a UnifiedAccelerator for Non-linear Functions in Transformers | Haonan Du |
16:20-16:50 | AI for EDA: From the Perspective of Approximate Logic Synthesis | Xuan Wang |
16:50-17:20 | Boosting Standard Cell Library Characterization with Machine Learning | Zhengrui Chen |
17:20-17:25 | Closing remarks | Xunzhao Yin |
17:25-17:30 | Adjourn |