Publications

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2025

  1. J13
    ZlibBoost: An Efficient and Flexible Open-Source Framework for Standard Cell Characterization
    Zhengrui Chen, Chengjun Guo, Shizhang Wang, and 8 more authors
    ACM Transactions on Design Automation of Electronic Systems, 2025
  2. J12
    SenHDC: A 3-D NAND Flash-Based Processing-in-Sensor Hyperdimensional Computing Architecture
    Xuchu Huang, Qingrong Huang, Zeyu Yang, and 4 more authors
    IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2025
  3. C25
    Deploying Edge LLMs for Wafer Defect Detection in Chip Manufacturing
    Xiaolei Zhou, Yuanjie Zhang, Songyu Sun, and 2 more authors
    In 2025 International Symposium of Electronics Design Automation (ISEDA), 2025
  4. C24
    An Efficient Single-Cell Associative Search Engine via Conditional Execution
    Jiayi Wang, Yu Qian, Zeyu Yang, and 3 more authors
    In 2025 International Symposium of Electronics Design Automation (ISEDA), 2025
  5. C23
    FactorHD: A Hyperdimensional Computing Model for Multi-Object Multi-Class Representation and Factorization
    Yifei Zhou, Xuchu Huang, Chenyu Ni, and 4 more authors
    In 2025 62nd ACM/IEEE Design Automation Conference (DAC), 2025
  6. C22
    VQT-CiM: Accelerating vector quantization enhanced transformer with ferroelectric compute-in-memory
    Xuchu Huang, Haonan Du, Min Zhou, and 3 more authors
    In 2025 62nd ACM/IEEE Design Automation Conference (DAC), 2025
  7. J11
    ANAS: Software-hardware co-design of approximate neural network accelerators via neural architecture search
    Ying Wu, Zheyu Yan, Xunzhao Yin, and 2 more authors
    Integration, 2025
  8. J10
    NeFT: negative feedback training to improve robustness of compute-in-memory DNN accelerators
    Yifan Qin, Zheyu Yan, Dailin Gan, and 5 more authors
    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2025
  9. J9
    Empirical guidelines for deploying llms onto resource-constrained edge devices
    Ruiyang Qin, Dancheng Liu, Chenhui Xu, and 8 more authors
    ACM Transactions on Design Automation of Electronic Systems, 2025
  10. C21
    Hardware-Aware Compilation and Simulation for In-Memory Computing
    Asif Ali Khan, Hadjer Benmeziane, Hamid Farzaneh, and 8 more authors
    In 2025 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES), 2025
  11. C20
    Tiny-Align: Bridging Automatic Speech Recognition and Large Language Model on Edge
    Ruiyang Qin, Dancheng Liu, Gelei Xu, and 7 more authors
    In 2025 IEEE/ACM International Conference On Computer Aided Design (ICCAD), 2025
  12. C19
    FACAM: Design and Optimization of A Compact Energy Efficient FeFET-Based Analog Content Addressable Memory
    Jiahao Cai, Ann Franchesca Laguna, Zeyu Yang, and 5 more authors
    In 2025 IEEE/ACM International Conference On Computer Aided Design (ICCAD), 2025
  13. J8
    QUNF+: A Quadratic Approximation Framework with Hardware Co-Design for Universal Nonlinear Function Acceleration in Neural Networks
    Haonan Du, Chenyi Wen, Zhengrui Chen, and 4 more authors
    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2025
  14. C18
    Boosting Standard Cell Library Characterization with Machine Learning
    Zhengrui Chen, Chengjun Guo, Zixuan Song, and 7 more authors
    2025 30th Asia and South Pacific Design Automation Conference (ASP-DAC), 2025
  15. C17
    Algorithm-Hardware Co-design of a Unified Accelerator for Non-linear Functions in Transformers
    Haonan Du, Chenyi Wen, Zhengrui Chen, and 4 more authors
    In 2025 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2025
  16. C16
    NVCiM-PT: An NVCiM-assisted Prompt Tuning Framework for Edge LLMs
    Ruiyang Qin, Pengyu Ren, Zheyu Yan, and 7 more authors
    In 2025 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2025
  17. C15
    A 10.60 μW 150 GOPS Mixed-Bit-Width Sparse CNN Accelerator for Life-Threatening Ventricular Arrhythmia Detection
    Yifan Qin, Zhenge Jia, Zheyu Yan, and 9 more authors
    2025 30th Asia and South Pacific Design Automation Conference (ASP-DAC), 2025

2024

  1. J7
    U-SWIM: Universal Selective Write-Verify for Computing-in-Memory Neural Accelerators
    Zheyu Yan, Xiaobo Sharon Hu, and Yiyu Shi
    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2024
  2. J6
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    Hardware Design and the Fairness of A Neural Network
    Yuanbo Guo*, Zheyu Yan*, Xiaoting Yu, and 6 more authors
    Nature Electronics, 2024
  3. J5
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    Compute-in-Memory based Neural Network Accelerators for Safety-Critical Systems: Worst-Case Scenarios and Protections
    Zheyu Yan, Xiaobo Sharon Hu, and Yiyu Shi
    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2024
  4. C14
    Towards Fairness of Neural Architecture Search via LLMs
    Ruiyang Qin, Yuting Hu, Zheyu Yan, and 3 more authors
    In 2024 29th Asia and South Pacific Design Automation Conference (ASP-DAC), 2024
  5. J4
    Personalized Meta-Federated Learning for IoT-Enabled Health Monitoring
    Zhenge Jia, Tianren Zhou, Zheyu Yan, and 2 more authors
    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2024
  6. C13
    Robust Implementation of Retrieval-Augmented Generation on Edge-based Computing-in-Memory Architectures
    Ruiyang Qin, Zheyu Yan, Dewen Zeng, and 9 more authors
    2024 International Conference on Computer-Aided Design (ICCAD), 2024
    Awarded arXiv
  7. C12
    TSB: Tiny Shared Block for Efficient DNN Deployment on NVCIM Accelerators
    Yifan Qin, Zheyu Yan, Zixuan Pan, and 3 more authors
    2024 International Conference on Computer-Aided Design (ICCAD), 2024
  8. C11
    Special Session: Sustainable Deployment of Deep Neural Networks on Non-Volatile Compute-in-Memory Accelerators
    Yifan Qin, Zheyu Yan, Wujie Wen, and 2 more authors
    In 2024 International Conference on Hardware/Software Codesign and System Synthesis (CODES+ ISSS), 2024
  9. J3
    CSA-CiM: Enhancing Multi-Functional Computing-in-Memory With Configurable Sense Amplifiers
    Yuxiao Jiang, Kai Ni, Thomas Kämpfe, and 3 more authors
    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2024

2023

  1. C10
    On the Viability of Using LLMs for SW/HW Co-Design: An Example in Designing CiM DNN Accelerators
    Zheyu Yan, Yifan Qin, Xiaobo Sharon Hu, and 1 more author
    In Proceedings of the 36th IEEE International System-on-chip Conference, 2023
  2. C9
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    Improving Realistic Worst-Case Performance of NVCiM DNN Accelerators through Training with Right-Censored Gaussian Noise
    Zheyu Yan, Yifan Qin, Xiaobo Sharon Hu, and 1 more author
    2023 International Conference on Computer-Aided Design (ICCAD), 2023
    Awarded DOI
  3. B2
    Hardware–Software Co-design of Deep Neural Architectures: From FPGAs and ASICs to Computing-in-Memories
    Zheyu Yan, Qing Lu, Weiwen Jiang, and 4 more authors
    In Embedded Machine Learning for Cyber-Physical, IoT, and Edge Computing: Software Optimizations and Hardware/Software Codesign, 2023
  4. C8
    DASALS: Differentiable Architecture Search-Driven Approximate Logic Synthesis
    Xuan Wang, Zheyu Yan, Meng Chang, and 2 more authors
    2023 International Conference on Computer-Aided Design (ICCAD), 2023

2022

  1. C7
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    SWIM: Selective Write-Verify for Computing-in-Memory Neural Accelerators
    Zheyu Yan, Xiaobo Sharon Hu, and Yiyu Shi
    2022 59th ACM/IEEE Design Automation Conference (DAC), 2022
    DOI arXiv
  2. C6
    Computing In Memory Neural Network Accelerators for Safety-Critical Systems: Can Small Device Variations Be Disastrous?
    Zheyu Yan, Xiaobo Sharon Hu, and Yiyu Shi
    2022 International Conference on Computer-Aided Design (ICCAD), 2022
  3. C5
    Radars: memory efficient reinforcement learning aided differentiable neural architecture search
    Zheyu Yan, Weiwen Jiang, Xiaobo Sharon Hu, and 1 more author
    In 2022 27th Asia and South Pacific Design Automation Conference (ASP-DAC), 2022
  4. B1
    On the Reliability of Computing-in-Memory Accelerators for Deep Neural Networks
    Zheyu Yan, Xiaobo Sharon Hu, and Yiyu Shi
    In System Dependability and Analytics: Approaching System Dependability from Data, System and Analytics Perspectives, 2022
    DOI
  5. C4
    A Semi-Decoupled Approach to Fast and Optimal Hardware-Software Co-Design of Neural Accelerators
    Bingqian Lu, Zheyu Yan, Yiyu Shi, and 1 more author
    TinyML Summit, 2022
    arXiv
  6. J2
    VisualNet: An End-to-End Human Visual System Inspired Framework to Reduce Inference Latency of Deep Neural Networks
    T. Wang, J. Zhang, J. Xiong, Song Bian, Zheyu Yan, and 5 more authors
    IEEE Transactions on Computers, 2022

2021

  1. C3
    Uncertainty modeling of emerging device based computing-in-memory neural accelerators with application to neural architecture search
    Zheyu Yan, Da-Cheng Juan, Xiaobo Sharon Hu, and 1 more author
    In 2021 26th Asia and South Pacific Design Automation Conference (ASP-DAC), 2021

2020

  1. C2
    Co-exploration of neural architectures and heterogeneous asic accelerator designs targeting multiple tasks
    Lei Yang, Zheyu Yan, Meng Li, and 6 more authors
    In 2020 57th ACM/IEEE Design Automation Conference (DAC), 2020
  2. J1
    Device-circuit-architecture co-exploration for computing-in-memory neural accelerators
    Weiwen Jiang, Qiuwen Lou, Zheyu Yan, and 4 more authors
    IEEE Transactions on Computers, 2020
  3. C1
    When single event upset meets deep neural networks: Observations, explorations, and remedies
    Zheyu Yan, Yiyu Shi, Wang Liao, and 3 more authors
    In 2020 25th Asia and South Pacific Design Automation Conference (ASP-DAC), 2020